This application relies for priority upon Korean Patent Application No. 2001-18961, filed on Apr. 10, 2001, the contents of which are herein incorporated by reference in their entirety.
The present invention relates to a method for manufacturing a semiconductor device having a metal layer.
In integrated circuits, such as semiconductor devices, insulating layers and conductive layers are arranged in vertical and horizontal directions by a predetermined rule, and devices such as transistors, capacitors, interconnection layers, and plugs for connecting to interconnection layers, are formed by such arrangements. However, when semiconductor devices are formed on an upper portion of a first already-formed semiconductor device, the electrical characteristics of the firstly formed device may be changed and degraded by the later formed semiconductor device.
An example of variation in the characteristics of a first semiconductor device resulting from a subsequent process in the formation of a second semiconductor device can be found in a capacitor. In general, when manufacturing a capacitor, a lower electrode is first formed of a conductive material on a substrate, and a dielectric layer is formed on an upper portion of the lower electrode. Before forming an upper electrode on the dielectric layer, the dielectric layer is crystallized by annealing at about 700xc2x0 C. to improve the dielectric property of the capacitor. Next, the upper electrode is formed of a conductive material on the crystallized dielectric layer. In order to reduce leakage current caused by crystallization annealing at 700xc2x0 C., curing is performed at about 400xc2x0 C. in an oxygen atmosphere.
In a conventional metal-insulator-semiconductor (MIS) capacitor, polysilicon is used as a conductive material for a lower electrode and metal is used as a conductive material for an upper electrode. However, in more highly integrated semiconductor devices, the use of metal-insulator-metal (MIM) capacitors, in which lower and upper electrodes are formed of metal, is more common. Recently, noble metals such as platinum (Pt), ruthenium (Ru), iridium (Ir), rhodium (Rh), and osmium (Os), which do not react with the dielectric layer and have a high work function value, are used as upper and/or lower electrodes of capacitors.
Among the above metals, there is little reaction of Pt with oxygen at an interface with a dielectric layer of the oxide family, so that the surface of the Pt does not significantly oxidize even in a high temperature heating process in an oxygen atmosphere where crystallization annealing and curing are performed to improve the dielectric property. However, the surface of metals such as Ru, Ir, palladium (Pd), Rh, or Os, can be easily oxidized in a crystallization annealing and/or curing process, which may cause the metal oxide surface to have an expanded volume, increased surface roughness, and more varied surface morphology. These effects can be particularly significant when using a curing process to improve an interfacial property between an upper electrode and a dielectric layer at over 400xc2x0 C.
In more highly integrated semiconductor devices, electrodes of a capacitor are typically thinner, and metal oxide is typically formed at lower temperatures. For example, a photo of a state in which a ruthenium (Ru) layer having a thickness of 1000 xc3x85 is heated (cured) in an oxygen atmosphere at 400xc2x0 C., is shown in FIG. 1A, and a photo of a state in which a Ru layer having a thickness of 300 xc3x85 is heated (cured) at the same temperature, is shown in FIG. 1B. As shown in FIGS. 1A and 1B, the surface roughness of the thinner layer increased more, and its surface morphology became more varied, compared to the thicker layer. As shown in FIG. 2, swells 2 of ruthenium oxide (RuO2) are formed on the surface of an Ru layer 1 by thermal oxidation. The presence of the swells 2 (FIG. 2) and as shown in FIG. 1A renders the surface of Ru layer 1 not substantially flat which, when used within a capacitor, can result in an increase in the resistance and leakage current of the capacitor.
Thus, in order to reduce leakage current and resistance when using metals such as Ru, Ir, Pd, Rh, or Os to form electrodes of a capacitor, a technology for suppressing degradation of the surface of the metals is required.
According to embodiments of the present invention, methods of manufacturing a semiconductor device having a metal layer are provided which may limit changes to the surface roughness of metal layer during a curing process for the device. According to some embodiments, a metal layer is formed on a semiconductor substrate. The metal layer is pretreated by low temperature-oxidation at a first temperature, for example, about 150xc2x0 C., so that an upper surface of the metal layer is changed into a mixed phase of metal and oxygen. The metal layer is then heated at a second temperature higher than the first temperature, for example, about 400xc2x0 C., in an oxygen atmosphere.
In further embodiments, the metal layer is sufficiently oxidized during the low temperature oxidation pretreatment so that it is substantially resistant to further oxidation during a higher temperature heating, such as during a curing process to change a predetermined interfacial property between the metal layer and another semiconductor layer. The pretreatment is performed at a temperature and for a time duration for which the surface roughness of the metal layer is not substantially changed but for which it is rendered substantially resistant to further oxidation. By rendering the metal layer substantially resistant to further oxidation while not substantially changing its surface roughness, the surface roughness of the metal layer will be substantially resistant to change from oxidation during a subsequent higher temperature heating process.